Updated Memory Wall (markdown) authored by moebiusband73's avatar moebiusband73
...@@ -16,8 +16,8 @@ processors, e.g., in the molecular dynamics domain. ...@@ -16,8 +16,8 @@ processors, e.g., in the molecular dynamics domain.
Lets look at real data to investigate how the memory wall developed over Lets look at real data to investigate how the memory wall developed over
time. The following graph shows peak memory bandwidth (black line) and peak time. The following graph shows peak memory bandwidth (black line) and peak
double precision flop rates (red line) for one socket of Intel server chips in double precision flop rates (red line) for one socket of Intel server chips over
the last 35 years. The y-axis (MB/s for the bandwidth and MFlops/s for peak 35 years. The y-axis (MB/s for the bandwidth and MFlops/s for peak
performance) is in logarithmic scale! The dashed vertical line separates performance) is in logarithmic scale! The dashed vertical line separates
processors of the single-core and multi-core eras. The number behind the processors of the single-core and multi-core eras. The number behind the
processor micro-architecture is the frequency. We choose top bin variants for processor micro-architecture is the frequency. We choose top bin variants for
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